2011 Rajasthan Technical University B.Tech 7 Semester Computer science & engineering "Computer Aided Design For VLSI" question paper

Question Paper Details:


University: Rajasthan Technical University
Course: B.Tech Computer science & engineering 
Subject Computer Aided Design For VLSI
Exam Year:  Nov-Dec 2011
Year or Semester: Fourth year/ Seventh Semester
Paper Code: 7E4240
Unit- I

1. Explain abstraction levels of a circuit representation and also discuss corresponding views with the help of a circuit example. [Marks 16]

OR

1. What do you understand by circuit optimization. Explain it’s need and the process. [Marks 16]


Unit-II

2. What is Boolean function, also discuss it’s representation classified in tabulat, logic expression and BDDs.  [Marks 16]

OR

2. What is satisfiability of boolean function and how covering problems are associated with this. Explain by alogrithms. [Marks 16]


Unit-III

3. With the help of  a state diagram of hard wired control unit Explain control unit synthesis.   [Marks 16]

OR

3. Explain importance of scheduling in architectural synthesis. Discuss ALAP scheduling algorithm. [Marks 16]


Unit-IV

4. Explain Resource sharing in hierarchical sequencing graphs. [Marks 16]

OR

4. What do you understand by a cover of boolean function. What is minimum and minimal cover. Also explain major principles of heuristics logic minimization. [Marks 16]


Unit-V

5. Write short notes on following:
    a) Floor plan
    b) Placement                             [Marks 8*2]

OR

5. Write short notes on following:
    a) Global Routing Methods.
    b) Channel Routing Algorithm.        [Marks 8*2]



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